28335相关帖子
仿真运行时跑的很酸爽的一段程序，下载到FLASH后就不爽了，测试了一下IO口，同样的代码，仿真跑和烧写后跑，慢了两倍时间，代码从FLASH搬移到RAM又不会搞，晕死
C2000的FLASH太慢了 这个代码搬移，要动CMD文件，上次为了让代码在RAM跑，学着修改CMD文件，结果那天挂了两片28335，然后就再也不敢动CMD文件了
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很多配置和控制寄存器，问题依然存在
F28335的捕获模块用于PWM功能，遇到一个问题 实际仿真一下看看程序走到那里时，相关的变量出现了意料之外的变化
[quote][size=2][url=forum.php?mod=redirect&goto=findpost&pid=2316678&ptid=611975][color=#999999]tiankai001 发表于 ...
&&TMS320F28335的CPU Time有三个，分别为Timer0，Timer1，Timer2，其中Timer2是为操作系统DSP/BIOS保留的，当未移植操作系统时，可用来做普通的定时器。这三个定时器的中断信号分别为TINT0, TINT1, TINT2，分别对应于中断向量INT1，INT13，INT14。图1为定时器的结构框图，图中TIMH：TIM为计数寄存器...
了高速时钟？ERIC:高速时钟就是系统时钟。28027的高速时钟等于系统时钟，那还是像28335那样，高速时钟也是默认两分频么？还是默认等于系统时钟，不分频？Eric：F2802x 严格来讲其实没有高速时钟这么一说，除了有些外设模块是用低速时钟输入之外，其他的外设都是直接用系统时钟作为输入，如PWM， ADC。当然，每个模块内部都会有分频的寄存器。而PWM模块，内部就有相关的分频寄存器...
初学DSP，为了让程序可以保存到芯片中，就按照网上的方法，删掉了28335_RAM_lnk.cmd，然后添加了F28335.cmd文件。可是只有某些程序成功了；有些程序在重新上电后消失了，板子运行的是上一次的程序。不知道有没有相关完整的教程，详细学一下。还有就是了解到程序保存到FLASH中，但在RAM里面运行时比较好（详细在网上搜的），这个又怎么实现欸？ CCS6 和TMS320F28335...
变流器，储能变流器，光伏微电网matlabsimulink仿真+硬件实物DSP+TMS320F2812，F28335，PV建模，mppt，并网控制，LCL滤波，孤岛效应，无功补偿SVG，STATCOM
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变频伺服步进工控产品研发生产技术方案提供商
深圳市伊瑞...
正在学TMS320F28335这块板子，求助一份中文数据手册，在网上翻好久，下载都要钱或者会员。。。谢谢咯！！！
求助一份TMS320F28335的中文数据手册 要习惯看英文资料
我只有英文的，建议楼主配合视频和书，看英文的
做开发不看英文资料会吃大亏的
到处都是啊。
[url]https://wenku.baidu.com/view...
,CONT_ENABLE,SYNC_DISABLE,& &&&SYNC_SRC,OVRFLOW_DISABLE,SIXTEEN_BIT,CHINT_END,CHINT_ENABLE);
& & StartDMACH1();
当然首先AD要配置为连续采样模式，然后就可以直接去读DMABuf1数组的值了
dsp28335的AD采样DMA传输...
...........}
dsp28335的AD采样连续模式...
( (AdcRegs.ADCRESULT15)&&4);
dsp28335的AD采样单次模式...
低，而后再将SCL拉高，在SCL为高的期间再将SDA释放 (拉高) 。这样，一个STOP位就产生了。你会发现此后的SDA和SCL都是高，这就是是所谓的总线空闲了！
一句话：SCL是单向的，由master控制。而SDA是双向的，master可以控制，slaver也可以控制。
2.示波器探头会对波形产生影响，导致波形延时，使用是请注意。
TMS320F28335学习I2C总结笔记
TMS320F28335的串口有三个串口，SCIA，SCIB和SCIC，GPIO的管脚对应如下:
SCIA对应GPIO28/29和GPIO35/36两组可选，SCIB有四组管脚可以选择，分别是GPIO9/11,GPIO14/15,GPIO18/19,GPIO22/23,SCIC对应的是GPIO62/63。
首先需要定义管脚。
void InitSciaGpio() //初始化GPIO管脚...
过28335、28035，但学习基本流程都差不多，官网下资料，整块板子，开发板或自制。底层编程学习，应用。
去官网下载资料 先学习一下
可以看看TI的视频资料和培训这个 EEWORLD也有。
我的经验是用它做个简单的小产品，这就是我的方法！
遇到问题还可以到本论坛...
TI 的28335的一点疑惑：28335的ADC能不能自己在那儿连续循环采样？我想让采样频率大于PWM频率，就肯定不能用ePWM来触发ADC了。还有其他的触发方式吗？我看到28335的触发源除了外部触发，Epwm触发，还有软件触发，也不知道他所谓的软件触发是不是可以自己用一个定时器来触发，不知道那个S/W触发究竟是什么，还有一位连续运行模式CONT_RUN,是不是只要不工作于起动停止模式而工作...
，不是你接触的多就好，而是用一款单片机能开发出产品。反正我立挺STM32,也在用STM32开发东东，包括量产的没量产的
本帖最后由 我的学号 于 2016-12-28 08:27 编辑
每天基本的工作就是围绕DSP 28335 进行，2016这一年对它有了更加深刻的了解后来接触了 28069， 自身带协处理器，外设资源少些不过在各自领域各有千秋
看到大家都在说STM32 很好，就是觉得...
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DSP28335SCI串口查询发中断收的问题，启用FIFO 在线等、。。。。挺急的~~~...
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神速[/quote]
必须的，这种 活动必须积极参加！！！！！！！
tms320f28335
支持一下！
+1，我来一套
已经介绍客户参与
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最近实验室需要做个数字电源实验，在F28377和F28M35之间纠结，大家给点意见
1:三相10khz逆变器控制（PWM，AD之类的就不多说了）
2，高速的串口通信（之前看28335的手册，串口最高速度好像只能到38400bps，有点捉急）
3.最好有10M或以上的以太网（也可以通过外接芯片实现）
看论坛里面F28M35资料挺少的，不知道好不好入手
c2000选型问题...
\0\0\0eeworldpostqq 你眼中的TI DSP有多么的与众不同？ 活动连连不断，支持
怎么抢楼？
啦啦啦，目前在学习做的项目，50KW的并离网一体机，跟学长一起做。
使用的是ti非常著名的28335~
我想说的是DSP方面ti做的真不错，基本上是垄断，DM8168就是一例，不得不用
提到DSP,让我首推的当然是TI.尽管我做过ADI的,也做过MOTOROLA的.
附件 (SATA)的器件。应用领域广阔，可用于 数据采集处理系统、智能电力系统、高精度仪器仪表、中高端数控系统、通信设备和音视频数据处理等。
官网资料连接：http://www.ti.com/product/TMS320C6748
推荐使用TMS320F28335进行电机控制，
推荐理由：
我公司一直在用，效果很不错。
TMS320F28335型数字信号处理器TI公司的一款...
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浮点信号处理库 提供了实时浮点 fft 算法 C28x Floating-Point Unit Library 1.00 Beta1 http://focus.ti.com.cn/cn/lit/sw/sprc624/sprc624.zip?安 装 好 上 述 软 件 后 ， 在 ccs 的 component manager 里 边 选 择 Code Composer Studio-&build tools-&tms320c28xx-& 选 中 Texas Instrument C2000 Code generation tools&5.0.0B2& 保存设置退出，Rebuild project，就不会出现下面的报错了。 WARNING: invalid compiler option --float_support=fpu32 (ignored) C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp\TI2323, line 24: error: can't find input file 'rts2800_fpu32.lib' 从外部存储器执行的 FFT 测试代码：fft 输入数据和输出数据定位在外部存储器空间 zone6, 包括 FFT 功能的 timer0中断服务程序从 zone6执行。 以下是代码： //######################################################################### ## // // FILE: Example_2833xFFTExecuteFromXINTF.c // // TITLE: Example FFT Program That Executes From XINTF // // ASSUMPTIONS: // // This program requires the DSP2833x header files. // // As supplied, this project is configured for &boot to SARAM& // operation. The 2833x Boot Mode table is shown below. // For information on configuring the boot mode of an eZdsp, // please refer to the documentation included with the eZdsp, // // $Boot_Table: // // GPIO87 GPIO86 GPIO85 GPIO84 // XA15 XA14 XA13 XA12 // PU PU PU PU // ========================================== // 1 1 1 1 Jump to Flash // 1 1 1 0 SCI-A boot // 1 1 0 1 SPI-A boot // 1 1 0 0 I2C-A boot // 1 0 1 1 eCAN-A boot // 1 0 1 0 McBSP-A boot // 1 0 0 1 Jump to XINTF x16 // 1 0 0 0 Jump to XINTF x32 // 0 1 1 1 Jump to OTP // 0 1 1 0 Parallel GPIO I/O boot// 0 1 0 1 Parallel XINTF boot // 0 1 0 0 Jump to SARAM &&boot to SARAM& // 0 0 1 1 Branch to check boot mode // 0 0 1 0 Boot to flash, bypass ADC cal // 0 0 0 1 Boot to SARAM, bypass ADC cal // 0 0 0 0 Boot to SCI-A, bypass ADC cal // Boot_Table_End$ // // DESCRIPTION: // // This example configures CPU Timer0 and increments // a counter each time the timer asserts an interrupt. // // The ISR code is loaded into SARAM. The XINTF Zone 6 is // configured for x16-bit data bus. A porition of the code including FFT // is copied to XINTF for execution there. // // Watch Variables: // CpuTimer0.InterruptCount // InBuffer // OutBuffer // MagBuffer //######################################################################### ## // $TI Release: DSP2833x Header Files V1.10 $ // $Release Date: February 15, 2008 $ //######################################################################### ## #include &DSP2833x_Device.h& // DSP2833x Headerfile #include &DSP2833x_Examples.h& // DSP2833x Examples headerfile #include &math.h& #define PI 3.1415926 // This function will be loaded into SARAM and copied to // XINTF zone 6 for execution #pragma CODE_SECTION(cpu_timer0_isr,&xintffuncs&); //LED indicating the state of ISR execution #define LED (*(unsigned short int *)0x180000) //FFT Parameters #include &FPU.h& #define FFT_SIZE 1024 /* 32, 64, 128, 256, etc */ #define FFT_STAGES 10 /* log2(FFT_SIZE) */ /* Align the INBUF section to 2*FFT_SIZE in the linker file */#pragma DATA_SECTION(InBuffer, &FFTBUF&); float32 InBuffer[FFT_SIZE]; #pragma DATA_SECTION(OutBuffer, &ZONE6DATA&); float32 OutBuffer[FFT_SIZE]; #pragma DATA_SECTION(TwiddleBuffer, &ZONE6DATA&); float32 TwiddleBuffer[FFT_SIZE]; #pragma DATA_SECTION(MagBuffer, &ZONE6DATA&); float32 MagBuffer[FFT_SIZE/2]; RFFT_F32_STRUCT float32 a1=1.0,a2=100.0,a3=10000.0;//amplitudes float32 f1=5.00,f2=25.00,f3=45.00; //frequencies // Prototype statements for functions found within this file: void init_zone6(void); interrupt void cpu_timer0_isr(void); void main(void) { // Step 1. Initialize System Control: // PLL, WatchDog, enable Peripheral Clocks // This example function is found in the DSP2833x_SysCtrl.c file. InitSysCtrl(); // Step 2. Initalize GPIO: // This example function is found in the DSP2833x_Gpio.c file and // illustrates how to set the GPIO to it's default state. // InitGpio(); // Skipped for this example // Step 3. Clear all interrupts and initialize PIE vector table: // Disable CPU interrupts DINT; // Initialize the PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // This function is found in the DSP2833x_PieCtrl.c file. InitPieCtrl(); // Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000; // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // This will populate the entire table, even if the interrupt // is not used in this example. This is useful for debug purposes. // The shell ISR routines are found in DSP2833x_DefaultIsr.c. // This function is found in DSP2833x_PieVect.c. InitPieVectTable(); // Interrupts that are used in this example are re-mapped to// ISR functions found within this file. EALLOW; // This is needed to write to EALLOW protected registers PieVectTable.TINT0 = &cpu_timer0_ EDIS; // This is needed to disable write to EALLOW protected registers // Step 4. Initialize the Device Peripheral. This function can be // found in DSP2833x_CpuTimers.c InitCpuTimers(); // For this example, only initialize the Cpu Timers // Configure CPU-Timer 0, 1, and 2 to interrupt every second: // 100MHz CPU Freq, 1 second Period (in uSeconds) ConfigCpuTimer(&CpuTimer0, 100, 10000); // To ensure precise timing, use write-only instructions to write to the entire register. Therefore, if any // of the configuration bits are changed in ConfigCpuTimer and InitCpuTimers (in DSP2833x_CpuTimers.h), the // below settings must also be updated. CpuTimer0Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0 // Step 5. User specific code, enable interrupts: // Initalize XINTF Zone 6 init_zone6(); // Copy non-time critical code to XINTF // This includes the following ISR functions: cpu_timer0_isr(), cpu_timer1_isr() // The XintffuncsLoadStart, XintffuncsLoadEnd, and XintffuncsRunStart // symbols are created by the linker. Refer to the F28335_ram_xintf.cmd file. MemCopy(&XintffuncsLoadStart, &XintffuncsLoadEnd, &XintffuncsRunStart); for(i=0;i&FFT_SIZE;i++) { InBuffer[i] = a1 * sin(2 * PI * f1 * i / FFT_SIZE) + a2 * sin(2 * PI * f2 * i / FFT_SIZE)+a3 * sin(2 * PI * f3 * i / FFT_SIZE); } fft.InBuf = InB /* Input data buffer */ fft.OutBuf = OutB /* FFT output buffer */ fft.CosSinBuf = TwiddleB/* Twiddle factor buffer */ fft.FFTSize = FFT_SIZE; /* FFT length */ fft.FFTStages = FFT_STAGES; /* FFT Stages */ fft.MagBuf = MagB /* Magnitude buffer */ RFFT_f32_sincostable(&fft); /* Initialize twiddle buffer */ // Enable CPU int1 which is connected to CPU-Timer 0, CPU int13 // which is connected to CPU-Timer 1, and CPU int 14, which is connected // to CPU-Timer 2: IER |= M_INT1; // Enable TINT0 in the PIE: Group 1 interrupt 7 PieCtrlRegs.PIEIER1.bit.INTx7 = 1;// Enable global Interrupts and higher priority real-time debug events: EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM // Step 6. IDLE loop. Just sit and loop forever (optional): for(;;); } interrupt void cpu_timer0_isr(void) { CpuTimer0.InterruptCount++; for(i = 0; i & FFT_SIZE; i++) { InBuffer[i] = a1 * sin( 2 * PI * f1 * i / FFT_SIZE) + a2 * sin( 2 * PI * f2 * i / FFT_SIZE)+a3*sin(2*PI*f3*i/FFT_SIZE); } RFFT_f32(&fft); /* Calculate output */ RFFT_f32s_mag(&fft); /* Calculate magnitude */ LED = CpuTimer0.InterruptC // Acknowledge this interrupt to receive more interrupts from group 1 PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; } // Configure the timing paramaters for Zone 7. // Notes: // This function should not be executed from XINTF // Adjust the timing based on the data manual and // external device requirements. void init_zone6(void) { // Make sure the XINTF clock is enabled SysCtrlRegs.PCLKCR3.bit.XINTFENCLK = 1; // Configure the GPIO for XINTF with a 16-bit data bus // This function is in DSP2833x_Xintf.c InitXintf16Gpio(); EALLOW; // All Zones--------------------------------// Timing for all zones based on XTIMCLK = SYSCLKOUT XintfRegs.XINTCNF2.bit.XTIMCLK = 0; // Buffer up to 3 writes XintfRegs.XINTCNF2.bit.WRBUFF = 3; // XCLKOUT is enabled XintfRegs.XINTCNF2.bit.CLKOFF = 0; // XCLKOUT = XTIMCLK XintfRegs.XINTCNF2.bit.CLKMODE = 0; // Zone 6------------------------------------// When using ready, ACTIVE must be 1 or greater // Lead must always be 1 or greater // Zone write timing XintfRegs.XTIMING6.bit.XWRLEAD = 1; XintfRegs.XTIMING6.bit.XWRACTIVE = 2; XintfRegs.XTIMING6.bit.XWRTRAIL = 1; // Zone read timing XintfRegs.XTIMING6.bit.XRDLEAD = 1; XintfRegs.XTIMING6.bit.XRDACTIVE = 3; XintfRegs.XTIMING6.bit.XRDTRAIL = 0; // don't double all Zone read/write lead/active/trail timing XintfRegs.XTIMING6.bit.X2TIMING = 0; // Zone will not sample XREADY signal XintfRegs.XTIMING6.bit.USEREADY = 0; XintfRegs.XTIMING6.bit.READYMODE = 0; // 1,1 = x16 data bus // 0,1 = x32 data bus // other values are reserved XintfRegs.XTIMING6.bit.XSIZE = 3; EDIS; //Force a pipeline flush to ensure that the write to //the last register configured occurs before returning. asm(& RPT #7 || NOP&); } //========================================================================= == // No more. //========================================================================= == /* // TI File $Revision: /main/1 $ // Checkin $Date: August 29, :00 $ //######################################################################### ## // // FILE: // // TITLE: // // // // // // 28335_RAM_xintf_lnk.cmd Linker Command File For 28335 examples that run out of RAM This ONLY includes all SARAM blocks on the 28335 device. This does not include flash or OTP. Keep in mind that L0 and L1 are protected by the code security module.// // What this means is in most cases you will want to move to // another memory map file which has more memory defined. // //######################################################################### ## // $TI Release: DSP2833x Header Files V1.10 $ // $Release Date: February 15, 2008 $ //######################################################################### ## */ /* ====================================================== // For Code Composer Studio V2.2 and later // --------------------------------------// In addition to this memory linker command file, // add the header linker command file directly to the project. // The header linker command file is required to link the // peripheral structures to the proper locations within // the memory map. // // The header linker files are found in &base&\DSP2833x_Headers\cmd // // For BIOS applications add: DSP2833x_Headers_BIOS.cmd // For nonBIOS applications add: DSP2833x_Headers_nonBIOS.cmd ========================================================= */ /* ====================================================== // For Code Composer Studio prior to V2.2 // -------------------------------------// 1) Use one of the following -l statements to include the // header linker command file in the project. The header linker // file is required to link the peripheral structures to the proper // locations within the memory map */ /* Uncomment this line to include file only for non-BIOS applications */ /* -l DSP2833x_Headers_nonBIOS.cmd */ /* Uncomment this line to include file only for BIOS applications */ /* -l DSP2833x_Headers_BIOS.cmd */ /* 2) In your project add the path to &base&\DSP2833x_headers\cmd to the library search path under project-&build options, linker tab, library search path (-i). /*========================================================= */ /* Define the memory block start/length for the F28335 PAGE 0 will be used to organize program sections PAGE 1 will be used to organize data sections Notes:Memory blocks on F28335 are uniform (ie same physical memory) in both PAGE 0 and PAGE 1. That is the same memory region should not be defined for both PAGE 0 and PAGE 1. Doing so will result in corruption of program and/or data. L0/L1/L2 and L3 memory blocks are mirrored - that is they can be accessed in high memory or low memory. For simplicity only one instance is used in this linker file. Contiguous SARAM memory blocks can be combined if required to create a larger memory block. */ MEMORY { PAGE 0 : /* BEGIN is used for the &boot to SARAM& bootloader mode */ /* BOOT_RSVD is used by the boot ROM for stack. */ /* This section is only reserved to keep the BOOT ROM from */ /* corrupting this area during the debug process */ BEGIN : origin = 0x000000, length = 0x000002 /* Boot to M0 will go here */ BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */ RAMM0 : origin = 0x000050, length = 0x0003B0 RAML0 : origin = 0x008000, length = 0x001000 RAML1 : origin = 0x009000, length = 0x001000 RAML2 : origin = 0x00A000, length = 0x001000 RAML3 : origin = 0x00B000, length = 0x001000 ZONE6A : origin = 0x100000, length = 0x00E000 /* XINTF zone 6 program space */ CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ ADC_CAL : origin = 0x380080, length = 0x000009 RESET : origin = 0x3FFFC0, length = 0x000002 IQTABLES : origin = 0x3FE000, length = 0x000b50 IQTABLES2 : origin = 0x3FEB50, length = 0x00008c FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 BOOTROM : origin = 0x3FF27C, length = 0x000D44 PAGE 1 : RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */RAML4 : origin = 0x00C000, length = 0x001000 RAML5 : origin = 0x00D000, length = 0x001000 RAML6 : origin = 0x00E000, length = 0x001000 RAML7 : origin = 0x00F000, length = 0x001000 ZONE6B : origin = 0x10E000, length = 0x002000 /* XINTF zone 6 - data space */ } SECTIONS { /* Setup for &boot to SARAM& mode: The codestart section (found in DSP28_CodeStartBranch.asm) re-directs execution to the start of user code. */ codestart : & BEGIN, PAGE = 0 ramfuncs : & RAML0, PAGE = 0 .text : & RAML1, PAGE = 0 .cinit : & RAML0, PAGE = 0 .pinit : & RAML0, PAGE = 0 .switch : & RAML0, PAGE = 0 xintffuncs : LOAD = RAML1, RUN = ZONE6A, LOAD_START(_XintffuncsLoadStart), LOAD_END(_XintffuncsLoadEnd), RUN_START(_XintffuncsRunStart), PAGE = 0 .stack : & RAMM1, PAGE = 1 .ebss : & RAML4, PAGE = 1 .econst : & RAML5, PAGE = 1 .esysmem : & RAMM1, PAGE = 1 IQmath : & RAML1, PAGE = 0 IQmathTables : & IQTABLES, PAGE = 0, TYPE = NOLOAD IQmathTables2 : & IQTABLES2, PAGE = 0, TYPE = NOLOAD FPUmathTables : & FPUTABLES, PAGE = 0, TYPE = NOLOAD DMARAML4 : & RAML4, PAGE = 1 DMARAML5 : & RAML5, PAGE = 1 DMARAML6 : & RAML6, PAGE = 1 DMARAML7 : & RAML7, PAGE = 1 FFTBUF ALIGN( 2048 ) : { } & RAML6 PAGE 1 //FFTBUF ALIGN( 2048 ) : { } & ZONE6B PAGE 1 ZONE6DATA : & ZONE6B, PAGE = 1 .reset : & RESET, PAGE = 0, TYPE = DSECT /* not used */ csm_rsvd : & CSM_RSVD PAGE = 0, TYPE = DSECT /* not used for SARAM examples */ csmpasswds : & CSM_PWL PAGE = 0, TYPE = DSECT /* not used for SARAMexamples */ /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */ .adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD } /* //========================================================================= == // End of file. //========================================================================= == */
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