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&&&&&&&&&&&&单片机的系统扩展原理及接口技术 第8章习题答案 高锋第二版
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单片机的系统扩展原理及接口技术 第8章习题答案 高锋第二版 第8章 思考与练习题解析 【8—1】简述单片机系统扩展的基本原则和实现方法。 【答】系统扩展是单片机应用系统硬件设计中最常遇到的问题。系统扩展是指单片机内部各功能部件不能满足应用系统要求时，在片外连接相应的外围芯片以满足应用系统要求。80C5 1系列单片机有很强的外部扩展能力，外围扩展电路芯片大多是一些常规芯片，扩展电路及扩展方法较为典型、规范。用户很容易通过标准扩展电路来构成较大规模的应用系统。 对于单片机系统扩展的基本方法有并行扩展法和串行扩展法两种。并行扩展法是指利用单片机的三组总线(地址总线AB、数据总线DB和控制总线CB)进行的系统扩展；串行扩展法是指利用SPI三线总线和12C双线总线的串行系统扩展。 1．外部并行扩展 单片机是通过芯片的引脚进行系统扩展的。为了满足系统扩展要求，80C51系列单片机芯片引脚可以构成图8-1所示的三总线结构，即地址总线AB、数据总线DB和控制总线CB。单片机所有的外部芯片都通过这三组总线进行扩展。 2．外部串行扩展 80C51．系列单片机的串行扩展包括：SPI(Serial Peripheral Interface)三线总线和12C双总线两种。在单片机内部不具有串行总线时，可利用单片机的两根或三根I／O引脚甩软件来虚拟串行总线的功能。12C总线系统示意图如图8—2所示。 【8—2】如何构造80C51单片机并行扩展的系统总线? 【答】80C51并行扩展的系统总线有三组。 ①地址总线(A0～A15)：由P0口提供低8位地址A0～A7，P0 口输出的低8位地址A0～A7必须用锁存器锁存，锁存器的锁存控制信号为单片机引脚ALE输出的控制信号。由P2口提供高8位地址A8～A1 5。 ②数据总线(DO～D7)：由P0 口提供，其宽度为8位，数据总线要连到多个外围芯片上，而在同一时间里只能够有一个是有效的数据传送通道。哪个芯片的数据通道有效则由地址线控制各个芯片的片选线来选择。 ③控制总线(CB)：包括片外系统扩展用控制线和片外信号对单片机的控制线。系统扩展用控制线有ALE、PSEN、EA、WR和RD。 【8-3】 8OC51单片机扩展一片Intel 2764和一片Intel 6264，组成一个既有程序存储器又有数据存储器的系统，请画出逻辑连接图，并说明各芯片的地址范围。 【答】采用线选法译码。 注意：复位后，PC=0000 H。对芯片采用不同的控制线程序存储器2764和数据存储器的连接图如图8-3所示。 当P2.7=0,P2.6=0，PSEN=0时，选中2764，因此，程序存储器2764地址为0000 H～ 1FFF H(因为系统中只扩展了一片程序存储器，所以2764的CE端也可以直接接地)。要注意80C51内部自带程序存储器，当外扩程序存储器2764地址为0000 H～1FFFH时，必须将 80C51的EA引脚接地。若80C51的EA引脚接高电平，则2764地址为1000 H～2FFF H。 当P2.7=1，P2.6=0，P2.5=1，RD=0或WR=0时，选中6264，因此，数据存储器6264 地址为A000H～BFFFH。 【8—4】在80C51单片机系统中，外接程序存储器和外接数据存储器共用16位地址线A0～A15和8位数据线D0～D7，为什么不会发生冲突? 【答】因为对外接程序存储器和外接数据存储器采用不同的指令，从而产生不同的控制信号来加以区别。对不同类型存储器分时进行选通，不会引起混乱。 对程序存储器使用MOVC指令，该指令使PSEN输出变为低电平，而PSEN信号通常是作为扩展程序存储器的读选通信号，所以该信号低电平使得程序存储器读使能。 对外接数据存储器使用MOVX指令，该指令使能WR和RD信号。而RD和WR通常作为扩展数据存储器和I／O端口的读／写选通信号。 【8—5】8OC51单片机外扩多片8 KB×8位RAM芯片，要实现最大数据存储器扩展，采用74LSl38译码器进行地址译码，请画出扩展连接示意图，并说明各芯片的地址范围。 【答】8 KB容量的RAM需要13根地址线进行片内译码，因此，80C51单片机的16根地址总线还剩下3位，正好用做74LSl38译码器的输入，所以最多可以扩展8片8 KB容量的RAM，每个芯片的地址是确定的。8片8 KB数据存储器的扩展原理图如图8-4所示。 8片8 KB容量的数据存储器的地址分别为： (O)OOOO H～1FFFH (1)2000 H～3FFF H (2)4000 H～5FFFH (3)6000 H～7FFF H (4)8000 H~9FFFH (5)AOOO H~BFFF H (6)C000 H～DFFFH (7)E000 H～FFFF H 【8—6】举例说明程序存储器和数据存储器扩展的原则和方法。 【答】程序存储器采用并行扩展方式，而数据存储器可采用并行扩展方式，也可以采用串行扩展方式。 并行扩展方式时，程序存储器和数据存储器的地址线和数据线共用，但控制线不同，如程序存储器采用PSEN线为片外程序存储器的读选通信号，数据存储器采用RD和WR线为片外数据存储器的读／写选通信号。 【8—7】举例说明线选法和译码法的应用特点。 【答】在单片机应用系统中，为了惟一地选择片外某一存储单元或I／O端口，需要进行两次选择。一是必须先找到该存储单元 I／O端口所在的芯片，一般称为“片选”；二是通过对芯片本身所具有的地址线进行译码，然后确定惟一的存储单元或I／O端口，称为“字选”。 片选保证每次读／写时,只选中某一片存储器芯片 I／O接口芯片。常用的方法有线选法和地址译码法。 线选法一般是利用单片机的最高几位空余地址线中的一根(如 P2.7)做某一片存储器芯 片或I／O接口芯片的片选控制线，常用于应用系统中扩展芯片较少的场合。 译码法应用译码器对空余的高位地址线进行译码，而译码器的输出作为片选控制线，常用于应用系统中扩展芯片较多而空余的地址线不够线选的场合。常用的译码器有3／8译码器74LSl38、双2／4译码器74LSl39、4／1 6译码器74LSl54等。译码器输出为低电平有效。正常情况下，译码器只有一根输出是低电平，其余输出都是高电平。这样，当译码器输出作为单片机应用系统中外扩芯片的片选控制线时，保证每次读／写时只选中一个芯片。部分地址线参加译码时，称为部分地址译码，这时芯片的地址会有重叠。16 根地址线全部参加译码的，称为“全地址译码"。 【8-8】外接程序存储器的读信号为 ，外接数据存储器的读信号为 【答】外接程序存储器的读信号为PSEN ，外接数据存储器的读信号为RD 。 【8-9】请编程对扩展的并行数据存储器 KB)进行自检，若628128的每一单元读／写都正确，则把片内RAM中20 H单元内容清O，否则20 H内容为628128出错单元数(或20 H单元内容为FF H)。加上必要的伪指令，并对源程序加以注释。 【答】 ①628128数据存储器的扩展及自检，需对每一字节的每一位进行写1和读1操作，还需要对每一字节的每一位进行写O和读0操作。若写与读的值不一样，需判断628128数据存储器的硬件连接是否正确，存储器芯片是否完好以及数据传送指令是否正确。 ②628128数据存储器的容量为128 KB，芯片内有地址线17根(AO～A16)，若单片机选 用80C51，其地址线仅16根(A0~A 15)。这时可采用体选原理，把628128数据存储器分为两个存储体，每个存储体的容量为64 KB(也可分为4个存储体，每个存储体的容量为32 KB 等)，利用80C51单片机的I／O口线作为体选线，比如P1.1连628128的A16。 ③C51的连接图如图8-5所示。 程序如下： ERRORN EQU 20H ；20H中存放错误个数 FLAG BIT 00H ORG
0130 AJMP MAIN ORG 30H
MAIN： MOV ERRORN，#00H
CLR P1．0 ；选中628128芯片
CLR ,P1.1 ；首先进行低64 KB存储单元检测 003 7 C200 CLR FLAG
MOV DPTR，#C 7400 LOOP1： MOV A，#00H ;FLAG=0时，对低64 KB进行写0 003E F0 MOVX @DPTR，A ；FLAG=1时，对高64 KB进行写0 003F A3 INC DPTR
MOV A, DPH 0042 04 INC A
MOV A，DPL 0047 04 INC A
JNZ LOOP1 004A 200009 JB FLAG，NEXT1 ；FLAG=1，则表示结束转读 004D D200 SETB FLAG ；设FLAG=1，开始 KB写0 004F D29 1 SETB P1.1
MOV DPTR，# 013C AJMP 单片机的系统扩展原理及接口技术 第8章习题答案 高锋第二版
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